General information
            
            
                
                
                
                    
                        Organisation
                    
                    The French Alternative Energies and Atomic Energy Commission (CEA) is a key player in research, development and innovation in four main areas :
• defence and security,
• nuclear energy (fission and fusion),
• technological research for industry,
• fundamental research in the physical sciences and life sciences.
Drawing on its widely acknowledged expertise, and thanks to its 16000 technicians, engineers, researchers and staff, the CEA actively participates in collaborative projects with a large number of academic and industrial partners.
The CEA is established in ten centers spread throughout France
  
                
                
                    
                        Reference
                    
                    2025-37898  
                
        
                
                
                
                
             
	Description de l'unité
The LIST institute is part of the CEA (French Alternative Energies and Atomic Energy Commission) Technology Research Division. CEA-LIST brings together nearly 1,000 scientists, engineers and technicians, expert in smart digital systems. We are committed to developing high-added-value innovations that respond to the major challenges facing our economy and society. This internship will take place in the Grenoble site of the CEA-List institute, in a research team focused on integrated circuits design for a variety of applications (e.g., cybersecurity, Internet of Things, artificial intelligence).
Position description
	Category
Mathematics, information, scientific, software
	Contract
Internship
	Job title
FPGA Prototyping of Fully Homomorphic Encryption on RISC-V Microprocessors H/F
	Subject
Fully Homomorphic Encryption (FHE) enables computations directly on encrypted data, allowing processing without revealing its content. This could enable private online searches or confidential AI inference on sensitive data. However, current FHE systems are computationally intensive, requiring powerful and energy-hungry hardware. The internship aims to make FHE more efficient and accessible on low-power platforms like edge servers or mobile devices. The work involves profiling and analyzing FHE libraries (e.g., TFHE) on RISC-V architectures using emulators (e.g., QEMU) to assess performance and resource usage. The optimized design will then be deployed on an FPGA, with possible development of custom accelerators to further enhance FHE performance.
	Contract duration (months)
6
	Job description
	Fully Homomorphic Encryption (FHE) is a technology that allows computations to be performed directly on encrypted data, meaning that we can process information without ever knowing its actual content. For example, it could enable online searches where the server never sees what you are looking for, or AI inference tasks on private data that remain fully confidential. However, current FHE implementations are extremely demanding and typically require powerful CPUs or GPUs with high energy consumption. In this internship, the goal is to explore how to make FHE more accessible and efficient on smaller, low-power systems such as local edge servers or even mobile devices. The primary objective is to profile and analyze new promising FHE libraries (e.g., TFHE) on RISC-V microprocessor architectures using architectural emulators (e.g., QEMU), in order to understand their performance and resource needs. Then, the chosen architecture will be deployed on an FPGA board, adapting the microprocessor architecture to the target application. If time allows, the project may also include designing custom hardware accelerators to further boost FHE performance.
 
	Applicant Profile
	This offer is dedicated to master students looking for an ambitious research-oriented internship. Candidates should have a background in electronic or computer engineering, with solid knowledge of computer architectures and digital design. It is desirable to have experience with FPGA development, familiarity with RISC-V microprocessors or architectural simulators. Knowledge on cryptography is a plus.
 Position location
	Site
Grenoble
	Job location
France, Auvergne-Rhône-Alpes, Isère (38)
	Location
	  Grenoble
Candidate criteria
	PhD opportunity
Oui