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Post Doc - Innovative modeling for technology-design-system co-optimization H/F


Détail de l'offre

Informations générales

Entité de rattachement

Le Commissariat à l'énergie atomique et aux énergies alternatives (CEA) est un organisme public de recherche.

Acteur majeur de la recherche, du développement et de l'innovation, le CEA intervient dans le cadre de ses quatre missions :
. la défense et la sécurité
. l'énergie nucléaire (fission et fusion)
. la recherche technologique pour l'industrie
. la recherche fondamentale (sciences de la matière et sciences de la vie).

Avec ses 16000 salariés -techniciens, ingénieurs, chercheurs, et personnel en soutien à la recherche- le CEA participe à de nombreux projets de collaboration aux côtés de ses partenaires académiques et industriels.  

Référence

2019-9731  

Description de l'unité



CEA Tech is the world leader in technology research. The teams of research engineers are mobilized to build and transfer to industrial partners portfolios of technologies that meet the needs of the information, communication, energy and health technology sectors.

The Leti, one of CEA Tech's institutes, focuses on micro and nano technologies and their applications to wireless communication systems and components, biology and health, imaging, and Micro-Nano Systems (MNS )

Description du poste

Domaine

Technologies micro et nano

Contrat

Post-doctorat

Intitulé de l'offre

Post Doc - Innovative modeling for technology-design-system co-optimization H/F

Sujet de stage

Innovative modeling for technology-design-system co-optimization

Durée du contrat (en mois)

12/24 month

Description de l'offre

As the demand for mixed-mode/RF integrated circuits increases, the design of analog circuits in CMOS technology becomes more critical. Many authors have noted the long simulation times and the vast resources devoted to the analog circuit spice simulation particularly in mixed-mode/RF integrated circuits. The process frequently involves onerous iterations were sub-circuits have to be re-centered every time a figure-of-merit or a spec or a critical parameter is updated.  The problem is aggravated when the circuit is a proven concept to be ported to a new technology or when contextual process-development and circuit-design co-optimization is imposed in a limited time frame, a case frequently leading to design frustration and "deadline dictated" sub-optimal compromises.

In this framework automatic analog circuit synthesis has been the subject of active research as a mechanism to increase designers' productivity. One central idea in this area is to apply optimization techniques to solve the circuit sizing problem while minimizing a cost function (power, area, etc.) under a set of specification constraints.

 

The Post-Doc will support the device modeling part of a research project investigating new methodologies for system and circuit optimization with the aim of achieving a better integration between the knowledge of the detailed characteristics of a specific technology, the circuit-design methodology and the system architecture. The practical goal is to leverage the existing multi-disciplinary know-how for benchmarking of system and technologies to advance the analysis past the usual power-performance-area PPA approaches that are commonly deployed in such cases.

In more detail, the Post-Doc will develop "pre"-spice models for actives and passives which will constitute the basic bricks for the optimization methodology developed in the overall project. Active device modeling will have a starting point in the works based on the analytical expression of invariants such has the inversion coefficient or the gm/Id sizing method.

 

If you are interested, please send your curriculum vitae and a motivation letter to luca.lucci@cea.fr

Profil du candidat

The candidate must have a PhD in engineering or in microelectronics or in materials physics with proven track record on compact modeling and device simulation.
A strong background on microelectronic devices and their manufacturing is required. Familiarity with analogue/RF circuits and RF application are also recommended. Previous experience in TCAD for process and/or device would be beneficial.
French spoken language would be appreciated but necessary support will be provided to develop a working level French language skills.

Localisation du poste

Site

Grenoble

Localisation du poste

France, Auvergne-Rhône-Alpes

Critères candidat

Langues

  • Anglais (Courant)
  • Français (Intermédiaire)

Demandeur

Disponibilité du poste

01/07/2019