Join CEA-Leti to pioneer a new class of neuromorphic circuits based on Selector-Only Memory / Threshold-Controlled Memory (SOM/TCM) devices. This PhD builds on the revival of cross-point arrays—shifting from 1S1R (PCM/OxRAM + OTS) toward SOM/TCM stacks with lower operating voltages, simpler integration, and clear paths to 3D scaling for AI-era density and bandwidth.

Modern AI models require memory systems that are simultaneously dense, fast, and frugal. Conventional current-mode reads burn power and risk disturbing device states. In this project, you will (i) explore robust biasing and forming/programming strategies for OTS-based TCM cells, (ii) design and validate a capacitive read that charges a sensing node cutting read energy and minimizing read-disturb—and (iii) exploit the devices’ transient/oscillatory regimes to implement neuromorphic primitives (neurons/synapses) directly in memory

Your work will span device-to-algorithm co-design: Verilog-A compact modeling and SPICE-level circuit design prototype SOM/TCM test chips and electrical characterization, and system-level evaluation of neural networks performances under realistic device constraints. You will work within Leti’s fabrication and test platforms and in close collaboration with IM2NP; the thesis is supervised by Prof. Jean-Michel Portal.

If advancing ultra-low-power neuromorphic computing excites you, this PhD offers end-to-end, hands-on experience—from nanodevices to neuromorphic systems—at the intersection of AI and nanotechnology.

With a background in microelectronics, you are a problem solver with strong adaptability and communication skills. You are curious and you like experimental team work. You have a keen interest in both emerging electronic devices and artificial neural networks applied to next-generation AI systems.