Near-sensor AI operating under tight power and energy constraints while retaining the ability to learn post-deployment is both technically exciting and increasingly essential for robust, privacy-preserving edge systems.

We explore dynamic neural networks that perform inference through energy-minimizing dynamics (e.g., Hopfield-type continuous-time solvers) for image denoising and basic reconstruction at the edge, while maintaining the ability to continue learning in the field via strictly local rules.
The internship project focuses on dimensioning an architecture whose synapses per layer map to a crossbar of Resistive RAM (RRAM) and on validating the algorithmic framework to guide the design of a small test vehicle. A possible target use case is patch-wise image denoising with on-chip, local learning enabling slow adaptation to drift.

The goal of this internship is to identify viable operating points that meet latency and energy targets within the given technology constraints (macro size, weight quantization, device variability, endurance). Using PyTorch, you will develop reference models of dynamic neural networks and evaluate alternative architectural realizations, quantifying trade-offs in latency, quality, and energy under realistic precision and variability conditions.
Building on these results, you will propose an on-chip learning policy that respects RRAM endurance while allowing slow adaptation to sensor or scene changes, and you will translate the findings into hardware-sizing guidelines to de-risk a physical prototype.

For outstanding candidates, a PhD continuation is possible in partnership with the industrial company Weebit Nano.

M2 student in EE/CS/Applied Mathematics, solid Python/PyTorch and linear-algebra skills, interest in neuromorphic/edge AI.