General information
Organisation
The French Alternative Energies and Atomic Energy Commission (CEA) is a key player in research, development and innovation in four main areas :
• defence and security,
• nuclear energy (fission and fusion),
• technological research for industry,
• fundamental research in the physical sciences and life sciences.
Drawing on its widely acknowledged expertise, and thanks to its 16000 technicians, engineers, researchers and staff, the CEA actively participates in collaborative projects with a large number of academic and industrial partners.
The CEA is established in ten centers spread throughout France
Reference
2025-37844
Division description
Au sein du CEA, l'Institut LIST dédie ses activités aux systèmes numériques intelligents avec des programmes de R&D dans le manufacturing avancé, les systèmes embarqués, et l'intelligence ambiante. Nous accompagnons nos partenaires dans les domaines des transports, de l'industrie, de l'énergie, de la santé, de la sécurité et de la défense, pour transférer les technologies issues de l'innovation et pour améliorer leur compétitivité.
Description de l'unité
Within the CEA List, the Electronics Design Automation and Architectures Laboratory (LECA) has the mission to design innovative and flexible system-on-chip architectures that meet the challenges of performance, cost, energy consumption, safety and security, targeting critical embedded systems and HW accelerators for embedded AI. To reduce the development time and improve the quality of these architectures, the team of experts develop innovative design tools and methods.
Position description
Category
Electronics components and equipments
Contract
Fixed-term contract
Job title
Research Engineer in AI-Driven Modeling & Simulation for RISC-V Platforms H/F
Socio-professional category
Executive
Contract duration (months)
24
Job description
We are looking for a Research Engineer in AI-Driven Modeling & Simulation for RISC-V Platforms to join our team working on Advanced & AI-Driven Methods and Tools for Modeling, Simulation, and Design.
You will contribute to national and European projects focused on next-generation processors and computing platforms based on RISC-V, helping to strengthen Europe's technological sovereignty.
Your work will focus on the AI-based automatic extraction and generation of extra-functional properties (e.g. performance, power, area), with a strong emphasis on performance modeling. The goal is to significantly boost productivity in the early stages of system design, enabling more efficient and accurate evaluation and optimization of RISC-V architectures.
You will be responsible for:
- Designing and implementing innovative AI/ML techniques for the automatic generation of abstract HW models.
- Extending QEMU-based frameworks with the generated AI-based models for performance assessment of RISC-V computing platforms.
- Benchmarking and optimizing the proposed solutions to achieve fast, high-accuracy simulation.
- Collaborating with industrial and academic partners within national and European project consortia.
- Contributing to the scientific roadmap of the lab, identifying key research directions and opportunities.
- Publishing your work in top-tier international conferences and journals, and representing the team at international events, technical workshops, and project meetings.
#CEA-List ; #LI-CB1 ; #Ingénieure ; #Chercheuse ; #Research Engineer
Applicant Profile
Required qualifications
- PhD or Master’s degree in Computer Science, Electronics, Embedded Systems, Computer Engineering, or a related field.
- Experience or a demonstrated strong interest in applying AI/ML to hardware modeling, system design, or design-space exploration.
- Strong programming skills in in C/C++ and Python.
Desired qualifications
- Solid understanding of computer architecture and digital hardware systems, including processors, Network-on-Chip (NoC), and System-on-Chip (SoC) designs.
- Hands-on experience with fast simulation tools, such as QEMU, Spike, SystemC/TLM, or similar environments.
- Familiarity with hardware description languages (HDLs) such as VHDL and Verilog.
In accordance with the commitments made by the CEA to promote the integration of disabled people, this job is open to all. The CEA proposes arrangements and/or organizational possibilities for the inclusion of disabled workers.
Position location
Site
Saclay
Job location
France, Ile-de-France, Essonne (91)
Location
Saclay
Requester
Position start date
02/02/2026
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